An Effective Programmable Memory BIST for Embedded Memory
نویسندگان
چکیده
This paper proposes a micro-code based Programmable Memory BIST (PMBIST) architecture that can support various kinds of test algorithms. The proposed Non-linear PMBIST (NPMBIST) guarantees high flexibility and high fault coverage using not onlyMarch algorithms but also non-linear algorithms such as Walking and Galloping. This NPMBIST has an optimized hardware overhead, since algorithms can be implemented with the minimum bits by the optimized instructions. Finally, various and complex algorithms can be run thanks to its support of multi-loop. key words: Programmable BIST, test algorithm, multi-loop
منابع مشابه
Embedded Processor Based Built-In Self-Test and Diagnosis of Logic and Memory Resources in FPGAs
We present an embedded processor based approach for Built-In Self-Test (BIST) and diagnosis of programmable logic and memory resources in Field Programmable Gate Arrays (FPGAs). The resources under test include the programmable logic blocks (PLBs), large random access memories (RAMs), and digital signal processors (DSPs) in all of their modes of operation. The approach is applicable to any FPGA...
متن کاملOn-Chip BIST-Based Diagnosis of Embedded Programmable Logic Cores in System-on-Chip Devices
On-chip Built-In Self-Test (BIST) based diagnosis of the embedded Field Programmable Gate Array (FPGA) core in a generic System-on-Chip (SoC) is presented. In this approach, the embedded processor core in the SoC is used for reconfiguration of the FPGA core for BIST, initiating the BIST sequence, retrieving the BIST results, and for performing diagnosis of faulty programmable logic blocks, memo...
متن کاملAutonomous Built-in Self-Test Methods for SRAM Based FPGAs
Built-in Self-Test (BIST) approaches for Static Random Access Memory (SRAM) based Field Programmable Gate Arrays (FPGAs) must be capable of fully testing the resources in the device. A summary of current techniques is presented in this paper that covers the three main components of modern FPGAs: logic blocks, interconnects and embedded FPGA cores. Overhead requirements, coverage capability, tra...
متن کاملBuilt-In Self-Test of Configurable Cores in SoCs Using Embedded Processor Dynamic Reconfiguration
Built-In Self-Test (BIST) provides an effective way to test configurable cores in System-on-Chip (SoC) implementations. We present a case study of the use of dynamic reconfiguration from an embedded processor core to implement BIST for the programmable logic and routing resources in configurable cores in commercially available SoCs. Experimental results from actual implementations include speed...
متن کاملExploiting Programmable BIST For The Diagnosis of Embedded Memory Cores
This paper addresses the issue of testing and diagnosing a memory core embedded in a complex SOC. The proposed solution is based on a P1500-compliant wrapper that follows a programmable BIST approach and is able to support both testing and diagnosis. Experimental results are provided allowing to evaluate the benefits and limitations of the adopted solution and to compare it with previously prop...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
- IEICE Transactions
دوره 92-D شماره
صفحات -
تاریخ انتشار 2009